The VLSI group at Newcastle
VLSI design has seen enormous changes over the past twenty years. This is reflected in the work of the VLSI Group.
Prof. Kinniment and Prof. Whitfield obtained a substantial research grant called "Second generation VLSI design tools". The aim was to develop VLSI Design languages and associated automated layout tools and simulators. The project obtained a VAX 750. All developed software was written in the Pascal language and ran under the VAX/VMS operating system. There were three RA's involved, one of whom was Mr. A.M. Koelmans, who was subsequently appointed as a lecturer in the Computing Laboratory in 1985. Mr. M.R. McLauchlan, a Computing Laboratory lecturer, was also involved.
The main outcome of this project (subsequently developed with further funding from the Alvey project) was a complete design system called STRICT. It consisted of a high level design language which was interfaced to a layout system and a simulator. The high level language was rather unusual: it was based upon the functional programming paradigm, the aim being to allow formal verification of designs in addition to layout and simulation. The design system allowed development of a high level description, written in STRICT, into a low level GAELIC description.
In 1984, Dr. A.V. Yakovlev from the Leningrad Institute of Electrical Engineering visited the department for a year. His research interests included asynchronous design methods based on Petri Nets. One of the outcomes of the visit was that the STRICT language was extended to allow description of asynchronous designs (one of the first languages to do so, as far as we know).
During the second half of the 1980's the group was involved with the development of formal verification methods using the STRICT language and the Boyer Moore theorem prover. It was shown that a functional language such as STRICT is very suitable for formal verification, including the timing aspects of a design in addition to the structure and behaviour. By this time, the group had moved towards the use of SUN workstations and the Unix operating system.
The STRICT language was evaluated as part of the Alvey project, and it was concluded that it was quite suitable for industrial design projects, although the evaluators expressed worries that the concept of a functional design language was too advanced for design engineers.
A number of research funds were obtained in the area of development of tools and methods for the design of asynchronous circuits using Petri Nets. Some of these tools run on PCs. The size of the group expanded with the arrival of new RA's and also PhD students. Collaboration with the Electrical Engineering Dept. continues to the advantage of both Departments.
The key topics of research within the VLSI group are currently:
The group has worked extensively in topics (1-3), and is establishing a foothold in topics (4-5).
A Petri net model of a simple asynchronous processor.
Emphasis is being put on methods for asynchronous circuits synthesis with bounded delays, designs for low power and electromagnetic interference, whereas the study of purely speed-independent systems is in relative decline. This is mainly caused by the practical demands of industry whose interests in exploiting asynchronous techniques in future submicron technologies are increasing and where new design tools are required.
New software tools have been developed:
(1) Petrify - for the synthesis of asynchronous circuits and their Petri net models. Its first version has been built in close collaboration with the Polytechnic University of Catalunya, the Polytechnic of Turin, and the University of Aizu, Japan. The new methods and algorithms have dramatically improved the effectiveness and efficiency of the synthesis process.
(2) PUNT - for the analysis of Petri net models using net unfoldings. This method allows efficient verification of models of VERY large size and high degree of concurrency. A novel concept of Time Petri net unfolding is implemented. Both the theory and the software have been developed within a University Research Committee PhD Studentship.
These results have been presented at the Int. Conference on CAD (ICCAD'95), and Design Automation Conference (DAC'96), as well as at the 2nd IEEE Int. Symp. on Advanced Research in Asynchronous Systems and Circuits.
The group collaborates extensively with other researchers through ESPRIT ACiD-WG (9 other members of the Working Group, including 2 UK universities, Manchester and South Bank, Philips Research Labs and Polytechnics of Catalunya and Turin, Groningen and Eindhoven Universities, Technical University of Denmark, IMEC in Belgium). Additionally, the group also collaborates in the area of Petri net tools with University of Bristol (Project ASAP), with the University of Aizu (visiting fellowships and individual travel grants to Japan) in the area of arbiters and synchronisers.
The group's publications can be accessed on our Asynchronous Web page .