A. Yakovlev
University of Newcastle upon Tyne. 1995.
This paper approaches the problem of implementing an asynchronous control for a stage of the Sproull Counterflow pipeline processor (CFPP) as an exercise in combining two synthesis techniques recently developed for Petri nets. We first synthesise a number of Petri net models of the CFPP stage control from its original "five-state-five-event" description due to C. Molnar. Secondly, we implement these net models in asynchronous circuits, using two-phase and four-phase components. The latter stage involves synthesising circuits with arbitration elements from behavioural descriptions with internal conflicts. This exercise appears to be quite instructive in the sense that it helps to estimate the scope and power of formal methods and today's automatic tools in assisting the process of asynchronous design.