A. Semenov
A. Yakovlev
University of Newcastle upon Tyne. 1994
Obtaining a compact representation of the behaviour specified by Labelled Petri nets is an important part in verification of asynchronous circuit model at both abstract and logic synthesis levels. The paper outlines major problems of the application of the unfolding method to the bounded Petri nets. One of the possible ways of solving these problems is introduced. A new algorithm for verification of the behaviour specified by Signal Transition Graph is introduced and discussed.